CEG 7030L

VLSI Design Synthesis and Optimization Laboratory

Wright State University-Main Campus · UGRD · Fall 2026

1 section

Catalog description

Required laboratory for EE 7530. Department Managed Prerequisite(s): (Undergraduate level EE 4620 Minimum Grade of D and Undergraduate level EE 4620L Minimum Grade of D) or (Graduate level EE 6620 Minimum Grade of D and Graduate level EE 6620L Minimum Grade of D) Corequisite(s): CEG7030

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Class #wright_main_campus-CEG7030LFall 2026UGRD1 credits

Days & times: No scheduled meeting time
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Instructor: Staff

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