CEG 4322

Very Large Scale Integrated Circuit Design

Wright State University-Main Campus · UGRD · Fall 2026

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Introduction to VLSI system and subsystem design. Topics include CMOS devices and circuit design techniques, basic building blocks for CMOS design, fabrication processing and design rules, chip planning and layout, basic system subcomponents (adders, subtractors, ALUs, and others), system timing and power dissipation, simulation for VLSI design, and signal processing with VLSI. Prerequisite(s): (Undergraduate level EE 2000 Minimum Grade of D and Undergraduate level EE 2000L Minimum Grade of D) or Undergraduate level CEG 3320 Minimum Grade of D Corequisite(s): CEG4322L

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Class #wright_main_campus-CEG4322Fall 2026UGRD3 credits
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