ECE 361

Logic & Computer Design Laboratory

Trine University · UGRD · Fall 2026

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The lab provides an opportunity to design and implement digital design concepts in Field Programmable Gate Arrays (FPGAs). The lab serves a twofold purpose. In the first half of the semester, students will: design and verify combinational circuits, sequential circuits, and state machines using HDL and schematic tools and implement the design in an FPGA. In the second half of the semester, students will: work in a group setting to come up with a challenging project; design and implement the project in an FPGA; and demonstrate and present the design. Corequisite: ECE 363

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Class #trine_regional_non_traditional_c-0499Fall 2026UGRD1 credits
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