Digital Design with HDL

Catalog description

The course presents techniques for system design and implementation. It uses hardware description languages, such as VHDL (VHSIC (Very high-speed IC) hardware description language). The course aims to build solid experience on modeling systems with VHDL and to explain its alternatives. It also presents VHDL-AMS (Analog and mixed-signal VHDL) design and analysis of combinational and sequential components. The course also includes topics that deal with target architectures, FPGA synthesis, asynchronous/synchronous state machines and data busses. The course is associated with experiments set using software (e.g. VHDL (VHSIC (very high-speed IC) hardware description language), Verilog HDL, verification: ModelSim (Mentor Graphics), VCS simulator (Synopsys). Prerequisites: EE 310 with a minimum grade of C.