CSE 5372

RISC PROCESSOR DESIGN.

University of Texas at Arlington · UGRD · Fall 2026

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Design of a RISC processor, based on RISC V and custom instruction set architectures with implementation on an FPGA target for test and verification. Prerequisite: CSE 3442 , CSE 5400 , or consent of instructor.

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Class #texas_arlington-1729Fall 2026UGRD3 credits
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