ECE 6150
Digital VLSI Design
Tennessee Technological University · UGRD · Fall 2026
1 section
Catalog description
Hierarchical design of NMOS and MOS ASICs, MOS technology and fabrication. Standard cell and full-custom chip layout. FPGAs, FSMs, and iterative networks. Use of CAD tools.
Sections
Current meeting, instructor, credit, and enrollment details
001
Availability not recently verifiedClass #tennessee_technological-ECE6150Fall 2026UGRD3 credits
- Days & times
- No scheduled meeting time
- Meeting dates
- —
- Location
- —
- Instructor
- Staff
Class numbers and section codes come from the registrar.
Spot missing or incorrect course data?