GEN 5575

Electronic Design Automation (EDA) and Machine Learning Hardware

Stanford University · UGRD · Fall 2026

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The class teaches cutting-edge optimization and analysis algorithms for the design of complex digital integrated circuits and their use in designing machine learning hardware. It provides working knowledge of the key technologies in Electronic Design Automation (EDA), focusing on synthesis, placement and routing algorithms that perform the major transformations between levels of abstraction and get a design ready to be fabricated. As an example, the design of a convolutional neural network (CNN) for basic image recognition illustrates the interaction between hardware and software for machine learning. It will be implemented on a state-of-the-art FPGA board.

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Class #stanford-5575Fall 2026UGRD3 credits
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