Computer Organization and Architecture.

Catalog description

This course explores the fundamental principles of Computer Organization and Architecture, with a strong emphasis on RISC (Reduced Instruction Set Computer) architecture. Topics include instruction set architecture (ISA), addressing modes, and instruction formats. Students will examine the design and operation of the Arithmetic Logic Unit (ALU), data paths, and control. The course also introduces CPU performance evaluation techniques and delves into pipelining, including pipelined data paths, control, and hazard handling. Additionally, students will study the memory hierarchy, covering cache fundamentals, cache performance optimization, and virtual memory principles. Through practical exercises and hands-on projects, students will gain a deep understanding of modern processor design, with a particular focus on RISC-based architectures. (Fall) Prerequisite: EG2313.