EEEE 621
Design of Computer Systems
Rochester Institute of Technology · UGRD · Fall 2026
Catalog description
The purpose of this course is to expose students to the design of single and multicore computer systems. The lectures cover the design principles of instructions set architectures, non-pipelined data paths, control unit, pipelined data paths, hierarchical memory (cache), and multicore processors. The design constraints and the interdependencies of computer systems building blocks are being presented. The operation of single core, multicore, vector, VLIW, and EPIC processors is explained. In the first half of the semester, the lab projects enforce the material presented in the lectures through the design and physical emulation of a pipelined, single core processor. This is then being used in the second half of the semester to create a multicore computer system. The importance of hardware/software co-design is emphasized throughout the course. Students are further required to choose a research topic in the area of computer systems, perform bibliographic research, and write a research paper following a prescribed format.
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