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Purdue University Fort Wayne · 3 credits · UGRD

P: ECE 22900 and 27000. Introduction to the design of digital systems using VHDL hardware description language. Emphasis on how to write VHDL that will map readily to hardware. Projects assigned using commercial grade computer-aided design (CAD) tools for VHDL based design, VHDL simulation and synthesis.
Fall 2026 · 1 section
Aug 24 – Dec 20
| Section | Days & time | Location | Instructor |
|---|---|---|---|
| 01Class #11297 | Mo We · 5:00 – 6:15 PMMo We · 6:25 – 7:15 PM | Engineering,Tech, & Comp Sci 226 | Reidenbach, Bruce |
| 01 notes: Instructional method: Lecture | |||