ESE 3700

Circuit-Level Modeling, Design, and Optimization for Digital Systems

University of Pennsylvania · UGRD · Fall 2026

1 section

Catalog description

Circuit-level design and modeling of gates, storage, and interconnect. Emphasis on understanding physical aspects which drive energy, delay, area, and noise in digital circuits. Impact of physical effects on design and achievable performance.

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Class #pennsylvania_2-ESE3700Fall 2026UGRD1 credits

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