Superscalar, Multicore, and Multiprocessor Architecture

Catalog description

Computer architects extend scalar pipelined processors in several ways that exploit instruction-level parallelism (ILP) and thread-level parallelism (TLP). Deep pipelines, superscalar pipelines, out-of-order instruction execution, instruction re-ordering and speculative execution are example techniques exploiting ILP. Program partitioning, scheduling across multiple computing cores, and protocols that maintain the coherency of shared memory are example techniques exploiting thread-level parallelism. These techniques raise performance by increasing the number of instructions completed per clock cycle. This course explores these topics through classroom reading, case studies, and homework exercises demonstrating mastery of terminology, concepts, logic design, simulation, and calculations.