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Metropolitan State University of Denver · 3 credits · UGRD

Prerequisite(s): CEE 2310 with a grade of "C" or better This course is a continuation of CEE 2310. It covers the analysis and design of sequential (counters and shift registers) logic systems. Programmable Logic Devices (PLD) and associated Computer Aided Design (CAD) software are used to implement digital circuits by using the schematic design entry method. Johnson counter and Ring counter are studied. The general methods of analysis and design for Finite State Machine (FSM) is also introduced.
Fall 2026 · 1 section
Aug 17 – Dec 13
| Section | Days & time | Location | Instructor |
|---|---|---|---|
| 001Class #53045 | Mo We · 4:00 – 5:50 PM | Aerospace and Engineering Sci. 320 | Huang,Lin |