COMP 362
Computer Architecture
Loyola University Chicago · UGRD · Fall 2026
1 section
Catalog description
Introduction to digital logic and Verilog. Design and implementation of a CPU pipeline. Processor design, instruction set design, and addressing. Control structures and microprogramming. Memory management, caches, and memory hierarchies. Interrupts and I/O structures. Instruction dependencies and hazards. Design synthesis on FPGAs.
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001
Availability not recently verifiedClass #loyola_chicago-0972Fall 2026UGRD3 credits
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