Verilog Programming

Catalog description

This course discusses fundamental Verilog concepts of today's most advanced digital design techniques and it offers basic coverage of Verilog HDL from a practical design perspective. The course introduces Verilog HDL building blocks (design units) including modules, ports, processes and assignments. then it provides basic coverage of gate, dataflow (RTL), behavioral and switch modeling, timing and logic synthesis methodologies using simple circuits. Basic use of User-Defined Primitives (UPDs) will be described. Programmable logic and storage devices will also be covered. the course introduces many other essential techniques for creating tomorrow's complex digital design.