Low Power CMOS Design

Catalog description

Power consumption is one of the most important challenges of high-performance chips and portable devices. This introductory course covers the design of low-power circuitry in deep submicron technologies. The course also deals with soft errors in VLSI and studies the reliability of low power designs. Topics studied include leakage power, short channel effects and leakage mechanisms such as sub-threshold and gate leakage, Leakage minimization techniques such as transistor stacking, input control, dynamic threshold, interconnect design, Synopsis HSpice simulation, soft errors in advanced computer systems, error mechanisms, error rate, mitigation methodologies and impact of power optimizations on chip reliability.