ECE 8804
VLSI THEORY TO TAPEOUT
Georgia Institute of Technology-Main Campus · UGRD · Fall 2026
2 sections2 open now
Catalog description
VLSI Design: Theory to Tapeout: To get a permit, students must meet any applicable course pre-requisites, and perform adequately in a screening test. You must complete this Interest Form (https://forms.office.com/Pages/ResponsePage.aspx?id=u5ghSHuuJUuLem1_Mvqggz3rmJqW0eVKvDqQc_J2t2tUOVQ1Q0NFUDY4UlJDMk1GMVNPRVZDMDJGMCQlQCN0PWcuserv) to indicate your interest in taking this class and get information about the screening test and permit. Details of the test will be provided in the second week of August.
Sections
Current meeting, instructor, credit, and enrollment details
VLS
15 openSeats: 0/15 seats Last recorded: Aug 9, 2026, 8:32 AMClass #90978Fall 2026UGRD4 credits
15 available0 enrolled15 capacity0/0 waitlist
- Days & times
- TR 1400-1515
- Meeting dates
- Aug 24 – Dec 17
- Location
- Van Leer C340
- Instructor
- Sathe, Visvesh
Details checked 5 hours agoSeats checked 5 hours ago
VLA
15 openSeats: 0/15 seats Last recorded: Aug 9, 2026, 8:32 AMClass #90988Fall 2026UGRD0 credits
15 available0 enrolled15 capacity0/0 waitlist
- Days & times
- No scheduled meeting time
- Meeting dates
- Aug 24 – Dec 17
- Location
- —
- Instructor
- Sathe, Visvesh
Details checked 5 hours agoSeats checked 5 hours ago
Class numbers and section codes come from the registrar.
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