Hardware Acceleration via FPGA

Catalog description

In this course, students design system-on-chip applications for hardware acceleration via FPGAs. Students working in groups of 2-3 design, debug, and construct several systems that illustrate the design of parallel FPGA hardware linked to ARM processors running a LINUX operating system. The content focuses on laboratory work. The lectures are used primarily for the introduction of examples, description of specific modules to be designed, and instruction in the hardware and high-level design tools to be employed in the lab. Each laboratory assignment baselines the speed of execution for an algorithm of interest on the ARM processors, students are evaluated on the acceleration they can achieve by way of hardware acceleration via the FPGA. This is a culminating design experience (CDE) course. Students need to be comfortable with hardware design using Verilog, they need to be comfortable writing C, they need to be familiar with basic Linux concepts, and they are expected to understand the solution of ordinary differential equations, partial differential equations, and other iterated systems in order to implement them numerically and in parallel on the FPGA.