EEE 234

Digital Integrated Circuit Design.

California State University, Sacramento · UGRD · Fall 2026

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The background and techniques needed to design and layout digital circuits at the transistor level for mixed-signal integrated circuits are covered. Topics include the design, layout and characterization of digital logic gates at the transistor level, typical CMOS process flows, device models and physics, and chip level considerations.

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Class #california_state_sacramento-2207Fall 2026UGRD3 credits
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