CPE 151

CMOS and Digital VLSI Design.

California State University, Sacramento · UGRD · Fall 2026

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Introduction to CMOS logic gates and the design of CMOS combinational and sequential functions at the gate level, including CMOS memory. CMOS transistor theory is covered including: DC equations, threshold voltage, body effect, subthreshold region, channel length modulation, tunneling, and punch through. A basic exposure to VLSI includes: CMOS processing technology, layout, and CMOS logic design including power, delay and timing considerations. Students will use industry standard Computer Aided Design tools to verify designs and layouts.

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Class #california_state_sacramento-1295Fall 2026UGRD3 credits
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