ECE 3220

Digital Design with VHDL ((4))

California State University, Bakersfield · UGRD · Fall 2026

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Introduces logic system design using a hardware description language (VHDL). Covers the VHDL language in depth and explains how to use it to describe complex combinational and sequential logic circuits. Include a weekly lab where students will get hands-on experience implementing digital systems on Field Programmable Gate Arrays. Each week lecture meets for 150 minutes and lab meets for 150 minutes. There is a $10 course material fee.

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Class #california_state_bakersfield-0772Fall 2026UGRD
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