ECE 125

High Speed Digital Integrated Circuit Design

University of California Santa Barbara · UGRD · Fall 2026

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Advanced digital VLSI design: CMOS scaling, nanoscale issues including variability, thermal management, interconnects, reliability; non-clocked, clocked and self-timed logic gates; clocked storage elements; high-speed components, PLLs and DLLs; clock and power distribution; memory systems; signaling and I/O design; low-power design.

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Class #california_santa_barbara-2479Fall 2026UGRD
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